6.111 Handouts

Lectures	L01: Digital Abstraction, 9/4/08 [PDF] Lecture PSet #1 [PDF] L02: Logic Synthesis, 9/9/08 [PDF] Lecture PSet #2 [PDF] L03: Verilog, 9/11/08 [PDF] Lecture PSet #3 [PDF] L04: Sequential Logic, 9/16/08 [PDF] Lecture PSet #4 [PDF] L05: Finite State Machines, 9/18/08 [PDF] Lecture PSet #5 [PDF] L06: System Integration Issues, 9/23/08 [PDF] CI-M slides [PDF] Lecture PSet #6 [PDF] L07: Memories, 9/25/08 [PDF] fifo.v Lecture PSet #7 [PDF] L08: Arithmetic Circuits, 9/30/08 [PDF] L09: Multiplier & Pipelining, 10/2/08 [PDF] L10: Analog Building Blocks, 10/7/08 [PDF] L11: Final Project, 10/9/08 [PDF] L12: Video, 10/14/08 [PDF] L13: Video, 10/21/08 [PDF] micro8.v, pong_code.a L14: Potpourri, 10/23/08 [PDF]

Labs	Lab #1, checkoff deadline: 9/11/08 [HTML], Lab 1 Report Template [PDF] Lab #2, checkoff deadline: 9/18/08 [HTML] Lab #3, checkoff deadline: 10/2/08 [HTML] Lab #4, checkoff deadline: 10/16/08 [HTML] Lab #5, checkoff deadline: 10/23/08 [HTML]

Info	Information Form [PDF] Safety Memo [PDF] Kit signout form [PDF] Verilog-2001 Quick Reference [PDF] IEEE Std 1364-2001 Verilog Hardware Description Language [MIT only] The IEEE Verilog 1364-2001 Standard. What's News, and Why You Need It Parameterized Models Using Verilog 2001 Synthesizable Verilog Programming Conventions and Resources Quick Start Guide to the Logic Analyzer [HTML] The XYZ's of Logic Analyzers [PDF] Report guide [HTML] The Mayfield Handbook of Technical and Scientific Writing Writing Guidelines for Engineering and Science Students (see the Design Reports section)

Data sheets	Texas Instruments Digital Logic Pocket Data Book [PDF] Pin Assignment Diagrams [PDF]