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Detailed
simulation:
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P1 ld
x ;null -> Sh, data sent to P1
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P2 ld
x ;Sh -> Sh, data sent to P2
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P3 ld
x ;Sh- > Sh data sent to P3
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P2 st
x ;Sh -> Ex, inv sent to P1 and
P3, data sent to P2
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P1 st
x ;Ex -> Ex, inv sent to P2, data
sent to P1
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P2 ld
x ;Ex -> Sh, data sent to P2
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Shortcut
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Record access
in a small meta-directory:
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x: {P1, 0,
r}, {P2, 1, r}, {P3, 2, r}, {P2, 3, w}, {P1, 4, w}, {P2, 5, r}
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All reads
and writes occur in a memory; no messages sent or received,
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no directory
modeled, no cache model in processor (?)
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When it
comes time for detailed simulation, we can reconstruct
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directory by
scanning backwards: x is shared by P1 and P2.
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