| Week of |
Mon |
Wed |
Fri |
| Sep 05 |
Labor Day |
L01: The digital abstraction, static discipline
|
L02: Combinational logic gates, logic families
|
| Sep 12 |
L03: Canonical logic representations, simplification and synthesis.
|
L04: Verilog hardware description language
|
L05: Sequential building blocks, state and feedback, latches, registers
|
| Sep 19 |
Student Holiday |
L06: Finite state machines, metastability and synchronization
|
Lab 1 checkoff by 5pm |
| Sep 26 |
L07: FSM example using FPGA and lab kit
|
L08: CI-M requirements. Memories
|
L09: System integration issues
|
| Oct 03 |
L10: Reconfigurable logic
|
L11: Project Kickoff
|
Lab 2 checkoff by 5pm |
| Oct 10 |
Columbus Day |
L12: Arithmetic circuits: adders, carry lookahead
| Lab 2 report due (in class) |
|
L13: Arithmetic circuits: multipliers, behavioral transformations
|
| Oct 17 |
L14: Analog building blocks
|
L15: Case study: Video circuits
|
Lab 3 checkoff by 5pm |
| Oct 24 |
L16: Power dissipation, reversible logic, quantum computing
|
L17: Case study: Architecture to Verilog, an extended example.
Last lecture.
|
Lab 4 checkoff by 5pm |
| Oct 31 |
| Lab 2 Revised Report by 5pm |
|
Evening Quiz
7:30 - 9:30, 34-101 |
|
| Project Proposal Conf. w/ TA |
|
| Nov 07 |
|
|
| Project Block Diagram Conf. w/ TA |
|
| Nov 14 |
Project Design Presentations
(M, Tu, W)
|
| Project Checklist Conf. w/ TA |
|
| Nov 21 |
|
|
Thanksgiving |
| Nov 28 |
|
|
|
| Dec 05 |
|
|
|
| Dec 12 |
Project Demos and videotaping
(Mon & Tue)
|
Project Demos and videotaping
|
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