6.111 Fall 2007

Week of Mon Wed Fri
Sep 03 Labor Day L01: The digital abstraction, static discipline L02: Combinational logic gates, logic families
Sep 10 L03: Canonical logic representations, simplification and synthesis. L04: Verilog hardware description language L05: Sequential building blocks, state and feedback, latches, registers
Lab #1 checkoff by 5pm
Sep 17 L06: Finite state machines, metastability and synchronization L07: FSM examples Lab #2 checkoff by 5pm
Sep 24 Student Holiday L08: System integration issues, clocking L09: CI-M Requirements, On-chip Memories
Oct 01 L10: External memories: SRAM, FLASH, DRAM L11: Analog building blocks Lab #3 checkoff by 5pm
Oct 08 Columbus Day L12: Arithmetic circuits: adders, carry lookahead
Lab #3 report due by 5pm
L13: Arithmetic circuits: multipliers, behavioral transformations
Oct 15 L14: Project Kickoff L15: Case study: Video circuits Lab #4 checkoff by 5pm
Oct 22 L16: Case study: digital signal processing
Project Teams due
L17: Case study: Architecture to Verilog, an extended example.
Last lecture.
Lab #5 checkoff by 5pm
Oct 29 Project Abstract due
Evening Quiz
7:30 - 9:30, 34-101
Project Proposal Conf. w/ staff
Writing Workshop, 1p-2p
Nov 05     Project Block Diagram Conf. w/ staff
Lab #3 Revised Report by 5pm
Nov 12 Veteran's Day Project Design Presentations
(Tue, Wed, Thu)
Project Checklist due
Nov 19     Thanksgiving
Nov 26      
Dec 03      
Dec 10 Project Demos and videotaping
(Mon & Tue)
Project Demos and videotaping
Project Report by 5pm
 

Last modified on 8/14/07